Semiconductor Yield / Defect Engineer (Wafer Fab, SEM Defect Review)

What You'll Do6

• Perform SEM defect review and classify defects found in wafer fabrication processes.
• Analyze yield loss mechanisms and link defect patterns to process issues.
• Assess excursion events and recommend lot holds or releases based on evidence and industry practices.
• Review and annotate wafer sort and test floor data, including bin maps and parametric datasets.
• Identify defect paretos and support source attribution to trace root causes.
• Document findings and share technical feedback in written and verbal formats for AI learning modules.

Requirements6

• Hands-on experience in wafer fab environments, focusing on SEM-based defect review and yield analysis.
• Expertise in production fabs with integrated sort/test floors; research cleanroom experience alone does not qualify.
• Knowledge of defect classification methods, excursion management, and yield improvement strategies.
• Ability to analyze wafer sort/bin data and interpret test floor metrics for defect and yield investigations.
• Strong written and verbal communication skills to explain complex technical concepts to varied audiences.
• Background in process integration or defect/yield engineering at major semiconductor manufacturing facilities.

Preferred Qualifications6

• Extensive hands-on experience in wafer fab environments with SEM-based defect review and yield analysis.
• Demonstrated expertise in production fabs with integrated sort/test floors.
• Proficiency with defect classification methodologies, excursion management, and yield improvement strategies.
• Strong ability to analyze wafer sort/bin data and interpret test floor metrics.
• Exceptional written and verbal communication skills.
• Background in process integration or defect/yield engineering at major semiconductor manufacturing facilities.

Who Should Apply

This role suits yield, defect, or process integration engineers with direct wafer fab experience, especially those from fabs with their own sort floors. Retired or former fab engineers are welcome. No AI background is required.

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